電子書：Constraining Designs for Synthesis and Timing Analysis: A Practical Guid

發布時間：2014-7-7 16:39 發布者：看門狗

關鍵詞：時序約束

Publication Date: May 7, 2013 Edition: 2013

This book serves as a hands-on guide to timing constraints in integrated circuit design. Readers will learn to maximize performance of their IC designs, by specifying timing requirements correctly. Coverage includes key aspects of the design flow impacted by timing constraints, including synthesis, static timing analysis and placement and routing. Concepts needed for specifying timing requirements are explained in detail and then applied to specific stages in the design flow, all within the context of Synopsys Design

Constraining Designs for Synthesis and Timing Analysis.pdf (8.58 MB)

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